Realization of preprocessing blocks of CNN based CASA system on FPGA
dc.authorid | 0000-0003-1282-0340 | |
dc.authorid | 0000-0003-3988-0941 | |
dc.authorid | 0000-0003-3377-2560 | |
dc.authorid | 0000-0001-8590-1518 | |
dc.contributor.author | Şavkay, Osman Levent | en_US |
dc.contributor.author | Yıldız, Nerhun | en_US |
dc.contributor.author | Cesur, Evren | en_US |
dc.contributor.author | Yalçın Müştak, Erhan | en_US |
dc.contributor.author | Tavşanoğlu, Ahmet Vedat | en_US |
dc.date.accessioned | 2019-08-31T12:10:23Z | |
dc.date.accessioned | 2019-08-05T16:04:56Z | |
dc.date.available | 2019-08-31T12:10:23Z | |
dc.date.available | 2019-08-05T16:04:56Z | |
dc.date.issued | 2013 | |
dc.department | Işık Üniversitesi, Mühendislik Fakültesi, Elektrik-Elektronik Mühendisliği Bölümü | en_US |
dc.department | Işık University, Faculty of Engineering, Department of Electrical-Electronics Engineering | en_US |
dc.description.abstract | In this paper, hardware optimization of the preprocessing part of a computer aided semen analysis (CASA) system is proposed, which is also implemented on an FPGA device as a working prototype. A real-time cellular neural network (CNN) emulator (RTCNNP-v2) is used for the realization of the image processing algorithms, whose regular, flexible and reconfigurable infrastructure simplifies the prototyping process. For future work, the post-processing part of the CASA system is proposed to be implemented on the same FPGA device as software, using either a soft or hard processor core. By the integration of the pre- and post-processing parts, the designed CASA system will be capable of processing full-HD 1080p@60 (1080×1920) video images in real-time. | en_US |
dc.description.version | Publisher's Version | en_US |
dc.identifier.citation | Şavkay, O. L., Yıldız, N., Cesur, E., Yalçın, M. E. & Tavşanoğlu, A. V. (2013). Realization of preprocessing blocks of CNN based CASA system on FPGA. Paper presented at the 2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings, 1-4. doi:10.1109/ECCTD.2013.6662238 | en_US |
dc.identifier.doi | 10.1109/ECCTD.2013.6662238 | |
dc.identifier.endpage | 4 | |
dc.identifier.isbn | 9783000437854 | |
dc.identifier.scopus | 2-s2.0-84892634613 | |
dc.identifier.scopusquality | N/A | |
dc.identifier.startpage | 1 | |
dc.identifier.uri | https://hdl.handle.net/11729/1906 | |
dc.identifier.uri | http://dc.doi.org/10.1109/ECCTD.2013.6662238 | |
dc.indekslendigikaynak | Scopus | en_US |
dc.institutionauthor | Tavşanoğlu, Ahmet Vedat | en_US |
dc.institutionauthorid | 0000-0001-8590-1518 | |
dc.language.iso | en | en_US |
dc.peerreviewed | Yes | en_US |
dc.publicationstatus | Published | en_US |
dc.relation.ispartof | 2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings | en_US |
dc.relation.publicationcategory | Konferans Öğesi - Uluslararası - Kurum Öğretim Elemanı | en_US |
dc.rights | info:eu-repo/semantics/closedAccess | en_US |
dc.subject | Computer aided | en_US |
dc.subject | FPGA devices | en_US |
dc.subject | Hardware optimization | en_US |
dc.subject | Image processing algorithm | en_US |
dc.subject | Post processing | en_US |
dc.subject | Processor cores | en_US |
dc.subject | Prototyping process | en_US |
dc.subject | Reconfigurable infrastructures | en_US |
dc.subject | Cellular neural networks | en_US |
dc.subject | Computer aided analysis | en_US |
dc.subject | Image processing | en_US |
dc.subject | Video signal processing | en_US |
dc.subject | Circuit theory | en_US |
dc.title | Realization of preprocessing blocks of CNN based CASA system on FPGA | en_US |
dc.type | Conference Object | en_US |
dspace.entity.type | Publication |
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