On the way to a third generation real-time cellular neural network processor

Basit Öğe Kaydı
dc.authorid0000-0003-3988-0941
dc.authorid0000-0001-8590-1518
dc.contributor.authorYıldız, Nerhunen_US
dc.contributor.authorCesur, Evrenen_US
dc.contributor.authorTavşanoğlu, Ahmet Vedaten_US
dc.date.accessioned2020-03-16T11:35:26Z
dc.date.available2020-03-16T11:35:26Z
dc.date.issued2016
dc.departmentIşık Üniversitesi, Mühendislik Fakültesi, Elektrik-Elektronik Mühendisliği Bölümüen_US
dc.departmentIşık University, Faculty of Engineering, Department of Electrical-Electronics Engineeringen_US
dc.description.abstractIn this proceeding, the architecture of a third generation Real-Time Cellular Neural Network (CNN) Processor (RTCNNP-v3) is disclosed, which is a digital CNN emulator to be implemented on an FPGA device. The previous generation emulator, RTCNNP-v2, is the only CNN implementation reported to be capable of processing full-HD 1080p@60 (1080×1920 resolution at 60 Hz frame rate) video images in real-time. However, there are some weaknesses in both the design and implementation of RTCNNP-v2, like the inability to process different parts of the video images in parallel, lack of support for recording and recalling intermediate frames using external memory and it has some jitter issues at computation rates above 200 MHz. All of those issues are addressed in the next architecture of our CNN emulator, RTCNNP-v3, which is being implemented of an FPGA device.en_US
dc.description.versionPublisher's Versionen_US
dc.identifier.citationCesur, E., Yıldız, N. & Tavşanoǧlu, A. V., (2016). On the way to a third generation real-time cellular neural network processor. Paper presented at the International Workshop on Cellular Nanoscale Networks and their Applications, 35-36.en_US
dc.identifier.endpage36
dc.identifier.isbn9783800742523
dc.identifier.issn2165-0160
dc.identifier.scopus2-s2.0-85057732456
dc.identifier.scopusqualityN/A
dc.identifier.startpage35
dc.identifier.urihttps://hdl.handle.net/11729/2283
dc.identifier.volume2016-08
dc.indekslendigikaynakScopusen_US
dc.institutionauthorTavşanoğlu, Ahmet Vedaten_US
dc.institutionauthorid0000-0001-8590-1518
dc.language.isoenen_US
dc.peerreviewedYesen_US
dc.publicationstatusPublisheden_US
dc.publisherIEEE Computer Societyen_US
dc.relation.journalInternational Workshop on Cellular Nanoscale Networks and their Applicationsen_US
dc.relation.publicationcategoryKonferans Öğesi - Uluslararası - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectAlgorithmsen_US
dc.subjectCellular neural networksen_US
dc.subjectDesign and implementationsen_US
dc.subjectExternal memoryen_US
dc.subjectField programmable gate arrays (FPGA)en_US
dc.subjectFPGA devicesen_US
dc.subjectFrame rateen_US
dc.subjectFull HDen_US
dc.subjectImage processingen_US
dc.subjectNanotechnologyen_US
dc.subjectNetwork architectureen_US
dc.subjectNonlinear networksen_US
dc.subjectReal timeen_US
dc.subjectThird generationen_US
dc.subjectVideo imageen_US
dc.titleOn the way to a third generation real-time cellular neural network processoren_US
dc.typeConference Objecten_US

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