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Yayın A low loss, low voltage and high Q active inductor with multi-regulated cascade stage for RF applications(Institute of Electrical and Electronics Engineers Inc., 2015) Momen, Hadi Ghasemzadeh; Yazgı, Metin; Köprü, RamazanNumerous structural planning of active inductors have been proposed as of not long ago in literature which showing tuning conceivable outcomes, low chip area and offering integration facility, they constitute promising architecture to replace passive inductors in RF circuits. The modified of a conventional active inductor based on Gyrator-C topology consisting of both transconductance stages realized by common-source configuration with multi-regulated cascade stage is presented. The Q factor and value of active inductor is adjusted with bias current and flexible capacitance, respectively. Multi regulated cascade stage is used to boost gain of input impedance and inductor value and decrease series resistance of designed inductor witch caused loss. The circuit is suitable for low voltage operation, high quality factor and low power dissipation. Simulation results are provided for 90 nm TSMC CMOS process with 1 V supply voltage. Self-resonance frequency and power consumption of active inductor is 8.9 GHz and 1.2 mW, respectively.Yayın CMOS high-performance UWB active inductor circuit(Institute of Electrical and Electronics Engineers Inc, 2016) Momen, Hadi Ghasemzadeh; Yazgı, Metin; Köprü, Ramazan; Saatlo, Ali NaderiIn order to maximize efficiency of the designed gyrator-based active inductor, advanced circuit techniques are used. Loss and noise are most important features of the AIs, where they should be low enough to have high-performance device. The gyrator-C topology is used to design a new low-loss and low-noise active inductor. The gyrator-C topology is potentially high-Q and all transistors are utilized in common-source configuration to have high impedance in input-output nodes. All transistors are free of body effect. The p-type differential pair input transistors and the feed forward path are employed to decrease noise of the proposed circuit. Additionally, inductance value and quality factor are adjusted by variation bias current which gives to the device tunable capability. HSPICE simulation results are presented to verify the performance of the circuit, where the 180 nm CMOS process and 1.8 V power supply are used. The noise voltage and power dissipation are less than 2.8 nV/ ? Hz and 1.3 mW, respectively.Yayın Designing a new high Q fully CMOS tunable floating active inductor based on modified tunable grounded active inductor(Institute of Electrical and Electronics Engineers Inc, 2015) Momen, Hadi Ghasemzadeh; Yazgı, Metin; Köprü, RamazanA new Tunable Floating Active Inductor (TFAI) based on modified Tunable Grounded Active Inductor (TGAI) is proposed. Multi regulated cascade stage is used in TGAI to boost gain of input impedance and inductor value thus the Q factor enhancement obtained. The arrangement of Multi-Regulated Cascade (MRC) stage is caused the input transistor which determines AI self-resonance frequency to be as small as possible and it is free of body effect which is crucial in sub-micron technology. Compared to traditional CMOS spiral inductors, the active inductor proposed in this paper can substantially improve its equivalent inductance and quality factor. This TFAI was designed using the AMS 0.18 um RF CMOS process, which demonstrates an adjustable quality factor of 10?567 with a 6?284 nH inductance. The Q factor and value of active inductor is adjusted with bias current and flexible capacitance (varactor), respectively. The self-resonance frequency for both grounded and floating AI is about 6.2 GHz. The proposed active inductor also shows wide dynamic range and higher quality factor compared to conventional floating active inductor circuits.Yayın A new high performance CMOS active inductor(IEEE, 2016) Momen, Hadi Ghasemzadeh; Yazgı, Metin; Köprü, Ramazan; Saatlo, Ali NaderiA new high-performance active inductor with ability to tune its self-resonance frequency and quality factor without affecting each other is presented in this letter. Using the input transistor of active inductor in cascoding configuration gives this property to designed circuit. Furthermore, the input transistor topology make the device robust in terms of its performance over variation in process and temperature. On the other hand, RC feedback is used to cancel the parasitic components in input node of the active device, which results to improve circuit performance. Schematic and post-layout simulation results shows the theory validity of the design. Monte Carlo and temperature analysis is done to show structure robustness in PVT variation. Inductive behavior frequency range of suggested structure is 0.3-11.4 GHz. Maximum quality factor is obtained as high as 3.7k at 6.3 GHz. Total power consumption is as low as 1mW with 1.8 V power supply.
