An algorithm and its architecture for half-pixel variable block size motion estimation

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dc.authorid0000-0001-9486-3226
dc.authorid0000-0002-7379-8397
dc.authorid0000-0002-6842-1528
dc.contributor.authorFatemi, Mohammad Reza Hosseinyen_US
dc.contributor.authorSalleh, Rosli Binen_US
dc.contributor.authorAteş, Hasan Fehmien_US
dc.date.accessioned2019-08-31T12:10:23Z
dc.date.accessioned2019-08-05T16:03:06Z
dc.date.available2019-08-31T12:10:23Z
dc.date.available2019-08-05T16:03:06Z
dc.date.issued2007
dc.departmentIşık Üniversitesi, Mühendislik Fakültesi, Elektrik-Elektronik Mühendisliği Bölümüen_US
dc.departmentIşık University, Faculty of Engineering, Department of Electrical-Electronics Engineeringen_US
dc.description.abstractThis paper presents an accurate half-pixel variable block size motion estimation algorithm and its hardware architecture. The proposed algorithm does not require interpolation of the reference frame pixels and has near performance to the conventional interpolation-search methods. These simplifications cause high level reduction in computational time and gate count without the need for internal or external half-pixel accuracy search memory. A simple, low latency, high throughput and fully utilized pipelined architecture of proposed algorithm is implemented in VHDL The proposed hardware architecture uses shift registers for multiplication and pipelining technique and can support half-pixel accuracy variable block size motion estimation for the real time HDTV format (1920 x1280 resolution and 30 Frames/sec).en_US
dc.description.versionPublisher's Versionen_US
dc.identifier.citationFatemi, M. R. H., Salleh, R. B. & Ateş, H. F. (2007). An algorithm and its architecture for half-pixel variable block size motion estimation. Paper presented at the 2007 IEEE International Conference on Telecommunications and Malaysia International Conference on Communications, 682-685. doi:10.1109/ICTMICC.2007.4448573en_US
dc.identifier.doi10.1109/ICTMICC.2007.4448573
dc.identifier.endpage685
dc.identifier.isbn9781424410934
dc.identifier.isbn9781424410941
dc.identifier.isbn1424410940
dc.identifier.scopus2-s2.0-48349108507
dc.identifier.scopusqualityN/A
dc.identifier.startpage682
dc.identifier.urihttps://hdl.handle.net/11729/1814
dc.identifier.urihttps://dx.doi.org/10.1109/ICTMICC.2007.4448573
dc.identifier.wosWOS:000256016500129
dc.identifier.wosqualityN/A
dc.indekslendigikaynakWeb of Scienceen_US
dc.indekslendigikaynakScopusen_US
dc.indekslendigikaynakConference Proceedings Citation Index – Science (CPCI-S)en_US
dc.institutionauthorAteş, Hasan Fehmien_US
dc.institutionauthorid0000-0002-6842-1528
dc.language.isoenen_US
dc.peerreviewedYesen_US
dc.publicationstatusPublisheden_US
dc.publisherIEEEen_US
dc.relation.ispartof2007 IEEE International Conference on Telecommunications and Malaysia International Conference on Communicationsen_US
dc.relation.publicationcategoryKonferans Öğesi - Uluslararası - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectAND gatesen_US
dc.subjectAutomatic voltage controlen_US
dc.subjectComputational complexityen_US
dc.subjectComputational timeen_US
dc.subjectComputer architectureen_US
dc.subjectCopyingen_US
dc.subjectDelayen_US
dc.subjectDiamond searchen_US
dc.subjectDigital televisionen_US
dc.subjectElectron beam lithographyen_US
dc.subjectEstimationen_US
dc.subjectExternal-en_US
dc.subjectH.264en_US
dc.subjectHalf-pixel accuracyen_US
dc.subjectHalf-pixel variable block size motion estimationen_US
dc.subjectHardwareen_US
dc.subjectHardware architectureen_US
dc.subjectHDTVen_US
dc.subjectHigh level computational reductionen_US
dc.subjectHigh throughputsen_US
dc.subjectImage codingen_US
dc.subjectInternational conferencesen_US
dc.subjectInterpolationen_US
dc.subjectITS architectureen_US
dc.subjectLow-latencyen_US
dc.subjectMalaysiaen_US
dc.subjectMotion estimationen_US
dc.subjectPipelined architectureen_US
dc.subjectPipelined architecturesen_US
dc.subjectPixelsen_US
dc.subjectReal timeen_US
dc.subjectReal time HDTV formaten_US
dc.subjectReference framesen_US
dc.subjectSearch memoryen_US
dc.subjectSearch methodsen_US
dc.subjectShift registersen_US
dc.subjectTelecommunication systemsen_US
dc.subjectTelevision broadcastingen_US
dc.subjectThroughputen_US
dc.subjectVariable block size motion estimationen_US
dc.subjectVector quantizationen_US
dc.subjectVideo codingen_US
dc.subjectVideo compressionen_US
dc.titleAn algorithm and its architecture for half-pixel variable block size motion estimationen_US
dc.typeConference Objecten_US
dspace.entity.typePublication

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