Optimisation of pedestrian detection system using FPGA-CPU hybrid implementation for vehicle industry

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dc.authorid0000-0002-4093-1059
dc.authorid0000-0001-8590-1518
dc.contributor.authorÖzcan, Ahmet Remzien_US
dc.contributor.authorTavşanoǧlu, Ahmet Vedaten_US
dc.date.accessioned2020-12-07T10:52:35Z
dc.date.available2020-12-07T10:52:35Z
dc.date.issued2019
dc.departmentIşık Üniversitesi, Mühendislik Fakültesi, Elektrik-Elektronik Mühendisliği Bölümüen_US
dc.departmentIşık University, Faculty of Engineering, Department of Electrical-Electronics Engineeringen_US
dc.description.abstractImproved image processing and developing technologies are rapidly expanding the application areas of image processing systems. In recent years, pedestrian detection systems have become one of the major safety technologies used in the automotive industry. This paper presents an optimised real-time pedestrian detection system using an FPGA-CPU based hybrid design. The histograms of oriented gradients (HOG) algorithm, which is extensively used for feature extraction in pedestrian detection applications, was implemented on a low-end FPGA. In the study, the original HOG descriptors are designed in low complexity without sacrificing performance. The obtained features were classified on a low-power single board computer with support vector machine (SVM). Tests with the INRIA pedestrian database show that the proposed model has high potential for use as a real-time low-cost pedestrian detection system in practice.en_US
dc.description.versionPublisher's Versionen_US
dc.identifier.citationÖzcan, A. R. & Tavşanoğlu, A. V. (2019). Optimisation of pedestrian detection system using FPGA-CPU hybrid implementation for vehicle industry. International Journal of Vehicle Design, 80(2-4) doi:10.1504/IJVD.2019.109865en_US
dc.identifier.doi10.1504/IJVD.2019.109865
dc.identifier.endpage222
dc.identifier.issn0143-3369
dc.identifier.issn1741-5314
dc.identifier.issue2-4
dc.identifier.issueSI
dc.identifier.scopus2-s2.0-85092315945
dc.identifier.scopusqualityQ4
dc.identifier.startpage209
dc.identifier.urihttps://hdl.handle.net/11729/2981
dc.identifier.urihttp://dx.doi.org/10.1504/IJVD.2019.109865
dc.identifier.volume80
dc.identifier.wosWOS:000576400300007
dc.identifier.wosqualityQ4
dc.indekslendigikaynakWeb of Scienceen_US
dc.indekslendigikaynakScopusen_US
dc.indekslendigikaynakScience Citation Index Expanded (SCI-EXPANDED)en_US
dc.institutionauthorTavşanoǧlu, Ahmet Vedaten_US
dc.institutionauthorid0000-0001-8590-1518
dc.language.isoenen_US
dc.peerreviewedYesen_US
dc.publicationstatusPublisheden_US
dc.publisherInderscience Enterprises Ltd.en_US
dc.relation.ispartofInternational Journal of Vehicle Designen_US
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectOptimisationen_US
dc.subjectVehicle designen_US
dc.subjectHOGen_US
dc.subjectHistogram of oriented gradientsen_US
dc.subjectComputer visionen_US
dc.subjectPedestrian detectionen_US
dc.subjectFPGAen_US
dc.subjectField programmable gate arrays (FPGA)en_US
dc.subjectHybrid vehiclesen_US
dc.subjectImage enhancementen_US
dc.subjectPedestrian safetyen_US
dc.subjectReal time systemsen_US
dc.subjectSupport vector machinesen_US
dc.subjectApplication areaen_US
dc.subjectHistograms of oriented gradients (HoG)en_US
dc.subjectHybrid implementationen_US
dc.subjectImage processing systemen_US
dc.subjectPedestrian detectionen_US
dc.subjectPedestrian detection systemen_US
dc.subjectSafety technologyen_US
dc.subjectSingle board computersen_US
dc.subjectFeature extractionen_US
dc.titleOptimisation of pedestrian detection system using FPGA-CPU hybrid implementation for vehicle industryen_US
dc.typeArticleen_US

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