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Yayın A low loss, low voltage and high Q active inductor with multi-regulated cascade stage for RF applications(Institute of Electrical and Electronics Engineers Inc., 2015) Momen, Hadi Ghasemzadeh; Yazgı, Metin; Köprü, RamazanNumerous structural planning of active inductors have been proposed as of not long ago in literature which showing tuning conceivable outcomes, low chip area and offering integration facility, they constitute promising architecture to replace passive inductors in RF circuits. The modified of a conventional active inductor based on Gyrator-C topology consisting of both transconductance stages realized by common-source configuration with multi-regulated cascade stage is presented. The Q factor and value of active inductor is adjusted with bias current and flexible capacitance, respectively. Multi regulated cascade stage is used to boost gain of input impedance and inductor value and decrease series resistance of designed inductor witch caused loss. The circuit is suitable for low voltage operation, high quality factor and low power dissipation. Simulation results are provided for 90 nm TSMC CMOS process with 1 V supply voltage. Self-resonance frequency and power consumption of active inductor is 8.9 GHz and 1.2 mW, respectively.Yayın An accurate CMOS interface small capacitance variation sensing circuit for capacitive sensor applications(Springer Birkhauser, 2017-12) Momen, Hadi Ghasemzadeh; Yazgı, Metin; Köprü, Ramazan; Naderi Saatlo, AliIn this paper, an accurate front-end CMOS interface circuit for sensing very small capacitance changes in capacitive sensors is presented. The proposed structure scales capacitance variation to the sensible impedance changing. The scaling factor of the circuit can be easily tuned by adjusting bias points of the transistors. In order to cancel or decrease the parasitic components, the RC feedback and input transistor cascading techniques are employed in the design. To simulate the circuit, HSPICE simulator is utilized to verify the validity of the theoretical formulations in 0.18 mu m technology. According to schematic and post-layout simulation results, input impedance changes linearly versus capacitance variations up to 0.7 GHz, while the sensor capacitance changing is varied between 0 and 200 fF. According to the simulation results, total dc power consumption is obtained as low as 1 mW with 0.9 V power supply.
