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Yayın Sperm morphology analysis with CNN based algorithms(IEEE Computer Society, 2014-08-29) Şavkay, Osman Levent; Cesur, Evren; Yalçın, Müştak Erhan; Tavşanoğlu, Ahmet VedatIn this paper Morphological Analysis part of our proposed computer-aided sperm analysis system (CASA) is simulated and the results beside the algorithm steps are presented. The morphology analysis is simply dealing with shape of the sperms and extracting the shape characteristics in medical parameters. The characteristics are obtained by image processing algorithms which utilizes Cellular Nanoscale Network (CNN) based and spatial image processing blocks. The following calculation of medical parameters are obtained from the outputs of image processing blocks. The algorithm is so designed to adapt the final SoC architecture such as Xilinx Zynq7000 device.Yayın Karma CPU + FPGA yapısı üzerinde tasarlanmış bilgisayar destekli sperm analizi sistemi(IEEE, 2015-06-19) Şavkay, Osman Levent; Tavşanoğlu, Ahmet Vedat; Yalçın, Müştak Erhan; Cesur, EvrenBu bildiride karma CPU + FPGA tabanlı bir donanım mimarisi üzerinde tasarlanan Bilgisayar Destekli Semen Analizi (BDSA) sistemi genel özellikleri ile anlatılmıştır. Spermatozoa motilite analizi hareketli çoklu nesne izleme algoritmasıdır, spermatozoa morfoloji analizi için ise ard arda uygulanan çeşitli durağan görüntü işleme yöntemleri ile yapılmaktadır. Sistemimizde kullanılan ve yüksek hız gerektiren hareketli ve durağan görüntü işleme işlevleri için FPGA yapısının paralel işlem yeteneğinden yararlanılmıştır. Çeşitli hesaplamalar ise geliştirilen özel yazılım ile CPU üzerinde gerçeklenmiştir. Biyolojik mikroskoba takılabilen bir HD dijital kamerayı da içermekte olan sistemimizin esnek programlanabilen ve tek başına çalışabilen bir akıllı sistem olarak çalışması da öngörülmüştür.Yayın An algorithm and its architecture for half-pixel variable block size motion estimation(IEEE, 2007) Fatemi, Mohammad Reza Hosseiny; Salleh, Rosli Bin; Ateş, Hasan FehmiThis paper presents an accurate half-pixel variable block size motion estimation algorithm and its hardware architecture. The proposed algorithm does not require interpolation of the reference frame pixels and has near performance to the conventional interpolation-search methods. These simplifications cause high level reduction in computational time and gate count without the need for internal or external half-pixel accuracy search memory. A simple, low latency, high throughput and fully utilized pipelined architecture of proposed algorithm is implemented in VHDL The proposed hardware architecture uses shift registers for multiplication and pipelining technique and can support half-pixel accuracy variable block size motion estimation for the real time HDTV format (1920 x1280 resolution and 30 Frames/sec).Yayın An incremental model selection algorithm based on cross-validation for finding the architecture of a Hidden Markov model on hand gesture data sets(IEEE, 2009-12-13) Ulaş, Aydın; Yıldız, Olcay TanerIn a multi-parameter learning problem, besides choosing the architecture of the learner, there is the problem of finding the optimal parameters to get maximum performance. When the number of parameters to be tuned increases, it becomes infeasible to try all the parameter sets, hence we need an automatic mechanism to find the optimum parameter setting using computationally feasible algorithms. In this paper, we define the problem of optimizing the architecture of a Hidden Markov Model (HMM) as a state space search and propose the MSUMO (Model Selection Using Multiple Operators) framework that incrementally modifies the structure and checks for improvement using cross-validation. There are five variants that use forward/backward search, single/multiple operators, and depth-first/breadth-first search. On four hand gesture data sets, we compare the performance of MSUMO with the optimal parameter set found by exhaustive search in terms of expected error and computational complexity.Yayın A cost-efficient bit-serial architecture for sub-pixel motion estimation of H.264/AVC(IEEE Computer Soc, 2008) Fatemi, Mohammad Reza Hosseiny; Ateş, Hasan Fehmi; Salleh, Rosli BinThis paper presents a new VLSI architecture for sub-pixel motion estimation in H.264/AVC encoder. It is based on an interpolation free algorithm that causes a high level reduction on memory requirement, hardware resources and computational complexity. A high performance, bit-serial pipeline architecture is proposed for quarter pixel accurate motion estimation which supports real-time H.264 encoding. Due to the bit-serial, modular and reusable architecture, it provides significant improvement in area cost (at least 390) and increases the macroblock processing speed almost 6 times when compared with the previous designs. The proposed architecture is suitable for portable multimedia devices where the memory and power consumption are limited.Yayın Computer assisted sperm motility analysis implemented on hybrid CPU+FPGA architecture as an intelligent microscope application(IEEE Computer Society, 2016) Şavkay, Osman Levent; Yalçın, Müştak Erhan; Tavşanoğlu, Ahmet VedatIn this paper we present a Computer Assisted Semen Analysis (CASA) system which is designed and implemented on a hybrid CPU+FPGA architecture platform. The sperm motility analysis deals with the dynamics of sperm movements, thus requires video analysis. A 1280x960 pixel, up to 30 fps programmable camera is used and attached to a trinocular microscope and a PC is used as an HMI and for post calculations, data logging and reporting. The proposed system enables real-time image processing and hence a fast analysis environment, which is important for sperm analysis. In this way we achieved a reconfigurable, reprogrammable, adaptable and extendible system, which can be interpreted as an intelligent microscope.
