Arama Sonuçları

Listeleniyor 1 - 6 / 6
  • Yayın
    Immitance data modelling via linear interpolation techniques
    (IEEE, 2002) Yarman, Bekir Sıddık Binboğa; Aksen, Ahmet; Kılınç, Ali
    With the advancement of the manufacturing technologies to produce new generation analog/digital communication systems, immitance data modelling has gained renewed importance in the literature. Specifically, models are utilised for behaviour characterisation, simulation of physical devices or to design sub-systems with active and passive solid-state components. Therefore, in this paper, new computer aided tools are presented to model one port immitance data by means of linear interpolation techniques. It is remarkable to observe that complex electrical behaviour of physical devices can be simulated with the models built utilising the linear interpolation of a few properly selected measured immitance data. An antenna example is presented to exhibit the implementation of the proposed techniques. It is expected that the new modelling tools will be employed to provide initial circuit topologies to the commercially available analysis/simulation and design packages.
  • Yayın
    Circuit models with mixed lumped and distributed elements for passive one-port devices
    (Işık Üniversitesi, 2006-01-23) Şengül, Metin; Aksen, Ahmet; Yarman, Bekir Sıddık Binboğa; Işık Üniversitesi, Fen Bilimleri Enstitüsü, Elektronik Mühendisliği Doktora Programı
    In this thesis, to model measured data obtained from an actual passive one-port device, a circuit modeling method with mixed lumped and distributed elements is proposed. Namely, measured data is modelled by means of its Darlington equivalent, in other words, as a lossless two-port terminated with a resistance. Two network topologies are examined. The first topology is ladder networks connected with unit elements and the second one is cascaded separate lumped and distributed networks. In the proposed modeling method, analytic expression of the input reflection coefficient of the two-port model is obtained by using gradient method, and then, after synthesizing this two-variable function, the model is reached. Thus, for the first time in the literature, a two-variable circuit modeling method is presented.
  • Yayın
    A parametric approach to construct two-variable positive real impedance functions for the real frequency design of mixed lumped-distributed matching networks
    (IEEE, 2004) Aksen, Ahmet; Pınarbaşı, Hacı; Yarman, Bekir Sıddık Binboğa
    In this paper, a parametric approach to construct two-variable positive real driving point impedance functions characterizing lossless ladder networks with mixed lumped and distributed elements is presented. The proposed approach is based on the generation of two-variable positive real impedance functions from the single variable boundary conditions. Utilizing the proposed parametric construction algorithm, real frequency matching technique is extended to the design of matching networks with mixed lumped and distributed elements. The application of the approach is illustrated by a broadband microwave amplifier design incorporating mixed lumped and distributed type matching networks. The resultant design has been compared with the AWR Microwave Office software simulation.
  • Yayın
    An integrated circuit with transmit beamforming and parallel receive channels for real-time three-dimensional ultrasound imaging
    (IEEE, 2006) Wygant, Ira O.; Lee, Hyunjoo J.; Nikoozadeh, Amin; Yeh, David T.; Oralkan, Ömer; Karaman, Mustafa; Khuri-Yakub, Butrus Thomas
    We present the design of an integrated circuit (IC) that will be flip-chip bonded to a 16 x 16-element CMUT array. The IC provides 16 receive channels which can be configured to receive along either of the array diagonals or on any single row of the array. On transmit, all 256 elements can be used to transmit arbitrarily focused beams. Focused transmission with the full array is made possible by on-chip pulsers and memory. A 25-V pulser and 8-bit shift register is provided for each element of the array. Prior to each transmit, new values are loaded into the shift registers. Current-con trolled one-shots control the transmit pulse widths. Circuit simulations and the IC layout are presented. Simulations predict that delay values can be loaded in less than 1.3 mu s and show the generation of precisely timed pulses. The IC is being prepared for submission to National Semiconductor for fabrication in a high-voltage BiCMOS process.
  • Yayın
    Single active device metamutator; Its application to impedance simulation and in particular to FDNR
    (IEEE, 2017) Minayi, Elham; Göknar, İzzet Cem
    he proposed Metamutator configuration employs only one Fully Differential Current Conveyor (FDCCII) which has 9 terminals including ground. By properly interconnecting these terminals a 4-port Metamutator is obtained without use of any other external element. It maintains the following advantages: (i) use of only one active element: less is the number of active devices less is the amount of disparity, (ii) possibility of realizing Memristors, Capacitors, Inductors, Frequency Dependent Negative Resistor (FDNR), which can be used to make integrated circuit active filters, (iii) no need to impose component choice constraints. SPICE simulations' results using TSMC 0.18 mu m CMOS process parameters and +/- 0.9V supply voltages validate the theoretical predictions.
  • Yayın
    Reflectance data model with mixed lumped and distributed elements for wireless communication systems
    (IEEE, 2005) Yarman, Bekir Sıddık Binboğa; Şengül, Metin; Kılınç, Ali; Aksen, Ahmet
    In this paper, a new method is presented to model the given reflectance data obtained from a "passive one-port physical device", as a lossless two port consists of lumped and distributed elements. Basis of the new method rests on the interpolation of the given data as a realizable bounded-real (BR) reflection function in two variables. The desired circuit model is then obtained as the result of the synthesis of this function in two kinds of elements; namely, distributed and lumped circuit elements. An algorithm is presented to generate the circuit model step by step and an example is also included to exhibit the utilization of the new modeling algorithm.