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Yayın A low loss, low voltage and high Q active inductor with multi-regulated cascade stage for RF applications(Institute of Electrical and Electronics Engineers Inc., 2015) Momen, Hadi Ghasemzadeh; Yazgı, Metin; Köprü, RamazanNumerous structural planning of active inductors have been proposed as of not long ago in literature which showing tuning conceivable outcomes, low chip area and offering integration facility, they constitute promising architecture to replace passive inductors in RF circuits. The modified of a conventional active inductor based on Gyrator-C topology consisting of both transconductance stages realized by common-source configuration with multi-regulated cascade stage is presented. The Q factor and value of active inductor is adjusted with bias current and flexible capacitance, respectively. Multi regulated cascade stage is used to boost gain of input impedance and inductor value and decrease series resistance of designed inductor witch caused loss. The circuit is suitable for low voltage operation, high quality factor and low power dissipation. Simulation results are provided for 90 nm TSMC CMOS process with 1 V supply voltage. Self-resonance frequency and power consumption of active inductor is 8.9 GHz and 1.2 mW, respectively.Yayın CMOS high-performance UWB active inductor circuit(Institute of Electrical and Electronics Engineers Inc, 2016) Momen, Hadi Ghasemzadeh; Yazgı, Metin; Köprü, Ramazan; Saatlo, Ali NaderiIn order to maximize efficiency of the designed gyrator-based active inductor, advanced circuit techniques are used. Loss and noise are most important features of the AIs, where they should be low enough to have high-performance device. The gyrator-C topology is used to design a new low-loss and low-noise active inductor. The gyrator-C topology is potentially high-Q and all transistors are utilized in common-source configuration to have high impedance in input-output nodes. All transistors are free of body effect. The p-type differential pair input transistors and the feed forward path are employed to decrease noise of the proposed circuit. Additionally, inductance value and quality factor are adjusted by variation bias current which gives to the device tunable capability. HSPICE simulation results are presented to verify the performance of the circuit, where the 180 nm CMOS process and 1.8 V power supply are used. The noise voltage and power dissipation are less than 2.8 nV/ ? Hz and 1.3 mW, respectively.Yayın Designing a new high Q fully CMOS tunable floating active inductor based on modified tunable grounded active inductor(Institute of Electrical and Electronics Engineers Inc, 2015) Momen, Hadi Ghasemzadeh; Yazgı, Metin; Köprü, RamazanA new Tunable Floating Active Inductor (TFAI) based on modified Tunable Grounded Active Inductor (TGAI) is proposed. Multi regulated cascade stage is used in TGAI to boost gain of input impedance and inductor value thus the Q factor enhancement obtained. The arrangement of Multi-Regulated Cascade (MRC) stage is caused the input transistor which determines AI self-resonance frequency to be as small as possible and it is free of body effect which is crucial in sub-micron technology. Compared to traditional CMOS spiral inductors, the active inductor proposed in this paper can substantially improve its equivalent inductance and quality factor. This TFAI was designed using the AMS 0.18 um RF CMOS process, which demonstrates an adjustable quality factor of 10?567 with a 6?284 nH inductance. The Q factor and value of active inductor is adjusted with bias current and flexible capacitance (varactor), respectively. The self-resonance frequency for both grounded and floating AI is about 6.2 GHz. The proposed active inductor also shows wide dynamic range and higher quality factor compared to conventional floating active inductor circuits.Yayın A new high performance CMOS active inductor(IEEE, 2016) Momen, Hadi Ghasemzadeh; Yazgı, Metin; Köprü, Ramazan; Saatlo, Ali NaderiA new high-performance active inductor with ability to tune its self-resonance frequency and quality factor without affecting each other is presented in this letter. Using the input transistor of active inductor in cascoding configuration gives this property to designed circuit. Furthermore, the input transistor topology make the device robust in terms of its performance over variation in process and temperature. On the other hand, RC feedback is used to cancel the parasitic components in input node of the active device, which results to improve circuit performance. Schematic and post-layout simulation results shows the theory validity of the design. Monte Carlo and temperature analysis is done to show structure robustness in PVT variation. Inductive behavior frequency range of suggested structure is 0.3-11.4 GHz. Maximum quality factor is obtained as high as 3.7k at 6.3 GHz. Total power consumption is as low as 1mW with 1.8 V power supply.Yayın A rectifier circuit using add-differentiate IC with a minimal number of CMOS transistors(IEEE, 2018) Göknar, İzzet Cem; Minayi, ElhamUsing the recently developed Add-Differentiate 5-terminal Integrated Circuit, AD-IC (which possess 12 CMOS transistors only), augmented with two diodes, a new rectifier configuration is presented. Transistor level circuit and its layout are provided and the rectifier is simulated with parameters extracted from the layout showing very good conformity with desired rectifier behavior. Finally, a table of comparison of the proposed rectifier with fourteen others, existing in the literature, is included to conclude the paper.Yayın Forward-looking IVUS imaging using a dual-annular ring CMUT array: Experimental results(IEEE, 2007) Güldiken, Rasim Oytun; Zahorian, Jaime S.; Gürün, Gökçe; Qureshi, Muhammad Shakeel; Balantekin, Müjdat; Tekeş, Coşkun; Hasler, Paul E.; Karaman, Mustafa; Carlier, Stephane; Değertekin, Fahrettin LeventThis paper presents the experimental results on forward-looking Intravascular ultrasound (FL-IVUS) using dual-annular-ring CMUT arrays. The array has a diameter of 1mm including bondpads which consists of separate, concentric 24 transmit and 32 receive ring arrays built on the same silicon substrate. This configuration has the potential for Independent optimization of each array and uses the silicon area more effectively without any drawback. For imaging experiments, we designed and constructed a custom integrated circuit using a standard 0.5 mu m CMOS process for data acquisition. A sample pulse-echo signal received from the oil-air Interface (plane reflector) at 6mm had a center frequency of 11MHz with 95% fractional 6-dB bandwidth. The measured SNR of the echo was 24 dB with no averaging. B-scan image of a wire-phantom was generated to test the resolution.Yayın Forward-looking IVUS imaging using an annular-ring CMUT array(IEEE, 2005) Değertekin, Fahrettin Levent; Karaman, Mustafa; Güldiken, Rasim OytunA 64-element, 1.15mm diameter annular-ring CMUT array was characterized and used for forward-looking IVUS imaging tests. The array was manufactured using low temperature processes suitable for CMOS electronics integration on a single chip. The 43×140µm2 array element has suitable view angle for forward looking imaging around 15MHz center frequency and pulse-echo measurements show nearly 100% fractional bandwidth around 17MHz. For imaging and SNR measurements, RF A-scan data sets from various targets were collected using an interconnect scheme forming a 32-element array configuration. The results demonstrate that annular-ring CMUT arrays fabricated with CMOS compatible processes are capable of forward-looking IVUS imaging.Yayın Üç boyutlu akustik görüntüleme için ön alıcı-verici tümdevre(IEEE, 2004) Çiçek, İhsan; Bozkurt, Ayhan; Karaman, MustafaTıbbi ultrasonik görüntüleme sistemleri, genel olarak bir çevirici elemanı ve akustik işaretin üretilip algılanmasından sorumlu elektronik oluşmaktadır. Tek boyutlu dönüştürücü dizileriyle, incelenmekte olan ortamın iki boyutlu kesit görüntüsü elde edilmektedir. Dönüştürücü teknolojisindeki son gelişmelerle, iki boyutlu dönüştürücü dizilerinin üretimi gerçekleştirilmiş, böylece üç boyutlu (hacimsel) görüntüleme yapılması mümkün olmuştur[1,2]. Ancak, özellikle Nyquist kriteri, dönüştürücü elemanların boyutlarını sınırladığı için, eleman boyutları oldukça küçülmüştür; bu da algılanan işareti oldukça zayıflatmaktadır. Bu nedenle, kabul edilebilir nitelikteki görüntülerin alınabilmesi için, alıcı-verici elektroniğinin iyileştirilmesi gerekmektedir. Bu çalışmada, iki boyutlu akustik çeviriciler için CMOS tabanlı ön alıcı-verici devresinin tasarımı gerçekleştirilmiştir. Devre, temel olarak, bir yüksek gerilim darbe üretici, alıcı-verici anahtarı, düşük gürültülü ön yükseltici ve dönüştürücü elemanın bağlantı dolgulamasından oluşmaktadır.Yayın Front-end CMOS electronics for monolithic integration with CMUT arrays: Circuit design and initial experimental results(2008) Gürün, Gökçe; Qureshi, Muhammad Shakeel; Balantekin, Müjdat; Güldiken, Rasim Oytun; Zahorian, Jaime S.; Peng, Shengyu; Basu, Arindam; Karaman, Mustafa; Hasler, Paul E.; Değertekin, Fahrettin LeventThis paper discusses design of CMOS-ASICs for monolithic integration of CMUT arrays by post-CMOS fabrication. We describe design strategies for monolithic integration and demonstrate the advantages of CMUT-on-CMOS approach. On the same wafer, separate sets of IC cells are designed to interface different types of CMUT arrays for IVUS and ICE applications. Circuit topologies include resistive feedback transimpedance amplifiers on the receiver side, along with multiplexers and buffers. Gains and bandwidths of receiving amplifiers are optimized separately to fit different array specifications such as number of elements, element size and operation bandwidth. To drive CMUTs a high voltage pulser array is designed in the same 3.3V unmodified CMOS technology by combining existing technological layers in an unconventional way. CMUT arrays are then built on top of the custom made 8" wafer containing these circuits fabricated in a 0.35µm standard CMOS process. We present initial characterization of the CMO electronics and pulse-echo measurements obtained post-CMOS fabricated CMUT elements.Yayın Single active device metamutator; Its application to impedance simulation and in particular to FDNR(IEEE, 2017) Minayi, Elham; Göknar, İzzet Cemhe proposed Metamutator configuration employs only one Fully Differential Current Conveyor (FDCCII) which has 9 terminals including ground. By properly interconnecting these terminals a 4-port Metamutator is obtained without use of any other external element. It maintains the following advantages: (i) use of only one active element: less is the number of active devices less is the amount of disparity, (ii) possibility of realizing Memristors, Capacitors, Inductors, Frequency Dependent Negative Resistor (FDNR), which can be used to make integrated circuit active filters, (iii) no need to impose component choice constraints. SPICE simulations' results using TSMC 0.18 mu m CMOS process parameters and +/- 0.9V supply voltages validate the theoretical predictions.
