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Yayın Design of a new low loss fully CMOS tunable floating active inductor(Springer New York LLC, 2016-12) Momen, Hadi Ghasemzadeh; Yazgı, Metin; Köprü, Ramazan; Saatlo, Ali NaderiIn this paper, a new tunable floating active inductor based on a modified tunable grounded active inductor is proposed. The multi regulated cascade stage is used in the proposed active structure to decrease the parasitic series resistance of active inductor, thus the Q factor enhancement is obtained. Furthermore, the arrangement of this stage leads to the smaller input transistor which determines active inductor’s self-resonance frequency and to be free of body effect which is crucial in sub-micron technology. Symmetrical design strategy has enabled both ports of the proposed floating active inductor to demonstrate the same properties. The Q factor and active inductor value are tuned with bias current and flexible capacitance (varactor), respectively. The self-resonance frequency of floating active inductor (~6.2 GHz) is almost the same as grounded prototype. In addition, the proposed active inductor also shows higher quality factor and inductance value compared to the conventional floating active inductor circuits. To show the performance of suggested circuit, simulations are done by using a 0.18 µm CMOS process, which demonstrates an adjustable quality factor of 10–567 with an inductance value range of 6–284 nH. Total DC power consumption and occupied area are 2 mW and 934.4 µm2, respectively.Yayın Metamutator applications: a quadrature MOS only oscillator and transconductance/transimpedance amplifiers(Springer New York LLC, 2016-06-18) Göknar, İzzet Cem; Yıldız, Merih; Minaei, ShahramNMOS based circuit realizations of a sinusoidal quadrature oscillator, a transconductance, a transimpedance amplifier are presented. All the circuits are constructed with a voltage-mode “Metamutator” consisting of an analog adder and a subtractor which is one of its possible realizations. The most important feature of the proposed circuits is their extremely simple structures containing only twelve NMOS transistors (six for adder, six for subtractor). Another significant advantage of the proposed circuits is that no external passive element is needed for the oscillator and only one resistor is used for each amplifier circuit; a variable resistor can provide gain adjustability. The post-layout simulations of all the proposed circuits have been executed using TSMC 0.25 µm process parameters with ±1.25 V power supply voltage.Yayın An accurate CMOS interface small capacitance variation sensing circuit for capacitive sensor applications(Springer Birkhauser, 2017-12) Momen, Hadi Ghasemzadeh; Yazgı, Metin; Köprü, Ramazan; Naderi Saatlo, AliIn this paper, an accurate front-end CMOS interface circuit for sensing very small capacitance changes in capacitive sensors is presented. The proposed structure scales capacitance variation to the sensible impedance changing. The scaling factor of the circuit can be easily tuned by adjusting bias points of the transistors. In order to cancel or decrease the parasitic components, the RC feedback and input transistor cascading techniques are employed in the design. To simulate the circuit, HSPICE simulator is utilized to verify the validity of the theoretical formulations in 0.18 mu m technology. According to schematic and post-layout simulation results, input impedance changes linearly versus capacitance variations up to 0.7 GHz, while the sensor capacitance changing is varied between 0 and 200 fF. According to the simulation results, total dc power consumption is obtained as low as 1 mW with 0.9 V power supply.Yayın Design of a front-end integrated circuit for 3D acoustic imaging using 2D CMUT arrays(IEEE-INST Electrical Electronics Engineers Inc, 2005-12) Çiçek, İhsan; Bozkurt, Ayhan; Karaman, MustafaIntegration of front-end electronics with 2D capacitive micromachined ultrasonic transducer (CMUT) arrays has been a challenging issue due to the small element size and large channel count. We present design and verification of a front-end drive-readout integrated circuit for 3D ultrasonic imaging using 2D CMUT arrays. The circuit cell dedicated to a single CMUT array element consists of a high-voltage pulser and a low-noise readout amplifier. To analyze the circuit cell together with the CMUT element, we developed an electrical CMUT model with parameters derived through finite element analysis, and performed both the pre- and postlayout verification. An experimental chip consisting of 4 x 4 array of the designed circuit cells, each cell occupying a 200 x 200 mu m(2) area, was formed for the initial test studies and scheduled for fabrication in 0.8 mu m, 50 V CMOS technology. The designed circuit is suitable for integration with CMUT arrays through flip-chip bonding and the CMUT-on-CMOS process.Yayın Annular-ring CMUT arrays for forward-looking IVUS: Transducer characterization and imaging(IEEE, 2006-02) Değertekin, Fahrettin Levent; Güldiken, Rasim Oytun; Karaman, MustafaIn this study, a 64-element, 1.15-mm diameter annular-ring capacitive micromachined ultrasonic transducer (CMUT) array was characterized and used for forward-looking intravascular ultrasound (IVUS) imaging tests. The array was manufactured using low-temperature processes suitable for CMOS electronics integration oil a single chip. The measured radiation pattern of a 43 X 140- mu m(2) array element depicts a 40 degrees view angle for forward-looking imaging around a 15-MHz center frequency in agreement with theoretical models. Pulse-echo measurements show a -10-dB fractional bandwidth of 104% around 17 MHz for wire targets 2.5 mm away from the array in vegetable oil. For imaging and SNR measurements, RF A-scan data sets from various targets were collected using all interconnect scheme forming a 32-element array configuration. An experimental point spread function was obtained and compared with simulated and theoretical array responses, showing good agreement. Therefore, this study demonstrates that annular-ring CMUT arrays fabricated with CMOS-compatible processes are capable of forward-looking IVUS imaging, and the developed modeling tools can be used to design improved IVUS imaging arrays.Yayın Range sensing with a Scheimpflug camera and a CMOS sensor/processor chip(IEEE-INST Electrical Electronics Engineers Inc, 2004-02) Çilingiroğlu, Uğur; Chen, Sicheng; Çilingiroğlu, EmreAn image-based range-sensing technique is presented. The technique is originally considered for highway collision avoidance applications, but its generality makes it suitable for application in robotics, manufacturing, and metrology, as well. It relies on depth from focus but, unlike conventional techniques, it extracts range with a single unmodulated Scheimpflug camera in continuous time. The range extraction algorithm is memoryless and simple enough to be implemented on the same chip with photosensors. The technique deploys a sensor plane that is tilted at a nonorthogonal angle with respect to the optical axis of the lens and the optical axis intersects the sensor plane at the focal point. This optical arrangement creates a focusable object plane in an orientation parallel to the optical axis and, thus, enables range sensing along the same axis. This paper elaborates on the details of focus sensing on the tilted sensor plane, describes the CMOS sensor/processor chip designed and prototyped for this application, and presents experimental results.Yayın Low-loss active inductor with independently adjustable self-resonance frequency and quality factor parameters(Elsevier Science BV, 2017-06) Köprü, Ramazan; Momen, Hadi Ghasemzadeh; Yazgı, Metin; Saatlo, Ali NaderiThis work presents a new low-loss active inductor whose self-resonance frequency and quality factor parameters can be adjusted independently from each other. In order to achieve this property, a new input topology has been employed which consists of cascode structure with a diode connected transistor. Furthermore, the proposed input topology makes the device robust in terms of its performance over variation in process, voltage and temperature. Additionally, RC feedback is used to cancel series-loss resistance of the active inductor, which allows self-resonant enhancement as well. Schematic and post-layout simulation results show the theoretical validity of the design. To validate the design feasibility for process, voltage and temperature changes, Monte Carlo and temperature analysis are done. Suggested structure shows inductor behavior in the frequency range of 0.3–11.3 GHz. Maximum quality factor is obtained as high as 2.1k at 5.9 GHz. Total power consumption is as low as 1 mW with 1.8 V power supply.
